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[Other resource] VHDL_Memory_Library_Code

Description: 通用存储器VHDL代码库,The Free IP Project VHDL Free-FIFO, Quartus standard library. -generic VHDL code for memory, The Free Project VHDL IP Free-FIFO, Quartus standard library.
Platform: | Size: 23722 | Author: Jawen | Hits:

[VHDL-FPGA-Verilog] fifo数据缓冲器的vhdl源程序

Description: 编了个8*8位的fifo数据缓冲器的vhdl源程序，是经过quartusII4.2编译成功的程序。。希望能跟各位交流-Bianlegan 8* 8 of the data buffer fifo VHDL source, after quartusII4.2 compiler successful procedures. . Hope you enjoy the exchanges
Platform: | Size: 1024 | Author: 夏社 | Hits:

[VHDL-FPGA-Verilog] VHDL_Memory_Library_Code

Description: 通用存储器VHDL代码库,The Free IP Project VHDL Free-FIFO, Quartus standard library. -generic VHDL code for memory, The Free Project VHDL IP Free-FIFO, Quartus standard library.
Platform: | Size: 23552 | Author: Jawen | Hits:

[VHDL-FPGA-Verilog] ASYfifo

Description: 这是FIFO程序，开发工具是ISE或QUartus。-procedures, development tools or QUartus ISE.
Platform: | Size: 1024 | Author: 黄德勇 | Hits:

[Embeded-SCM Develop] sd_audio_aic23

Description: SD卡和AIC23数字音频输出实验, FreeDev Audio Dsp Board采用了TI公司的TVL320AIC23 1、控制接口使用I2C，Quartus中将CS置低（器件地址0011010）。 2、数字音频接口使用了组件FreeDev_aic23,有三种测试和应用 模式，中断结合DMA方式能在NIOS II中采集和发送数据。中断信号 产生于模块中FIFO缓冲区的半满信号，读取数据端口自动清除中断 请求信号。 3、I2C IP 和FreeDev_aic23 IP分别在Quartus 工程目录中 4、SD卡读写通过SD_DAT0、SD_CLK、SD_CMD三个PIO信号线用软件 控制时序。 5、该范例读SD卡数据，通过DMA将Buffer数据送到FreeDev_aic23的 FIFO中实现数据播放。 6、SD卡中的数据必须是以48K*16bit保存的采样数据。数据可以通过SD读卡器写入。
Platform: | Size: 13312 | Author: HuFengzhang | Hits:

[VHDL-FPGA-Verilog] fifo8_8

Description:
Platform: | Size: 1024 | Author: 李松 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 512×8bid的FIFO 含工程文件，基于QUARTUs-512 × 8bid the FIFO with the project document, based on the QUARTUsII
Platform: | Size: 4096 | Author: 邵捷 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 先入先出FIFO，用QUARTUS进行仿真-FIFO FIFO, the simulation with QUARTUS
Platform: | Size: 363520 | Author: | Hits:

[VHDL-FPGA-Verilog] fifo-verilog

Description: 自己设计的一种FIFO寄存器，用verilog 编写，QUARTUS II下验证-Own design of a FIFO register, with verilog preparation, QUARTUS II certification under
Platform: | Size: 5120 | Author: wait | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 异步FIFO的VHDL程序，已经通过quartus编译和仿真。 -Asynchronous FIFO, VHDL program, has been compiled by quartus and simulation.
Platform: | Size: 20480 | Author: 白斌 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 基于Quartus平台利用SDRAM芯片设计FIFO 使数据能够高速写入 低速读出-Quartus platform based on the use of SDRAM chip design data to enable high-speed FIFO read write speed
Platform: | Size: 27648 | Author: 邬储 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: FIFO先进先出控制，调Quartus内核-FIFO IPcore
Platform: | Size: 3177472 | Author: Filter | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 是在quartus　ＩＩ软件的中编写的ｆｉｆｏ模块的ｖｅｒｉｌｏｇ　ＨＤＬ硬件描述语言代码，提供给大家希望对大家有一定的而帮助。-fjwe fe w w4 twtw43t4 t3fsjs fsd f swefw gewr ge ger g e t 3ewutowj otweu to teow t3o tewr to t3t t3e rtweo t3w 34 t34 o3tjwkl sj ter k.
Platform: | Size: 457728 | Author: 李万林 | Hits:

[VHDL-FPGA-Verilog] Flag-of-asynchronous-FIFO

Description: Quartus平台，VHDL代码编写的带标志位的异步FIFO。-Quartus platform, VHDL code is written with the sign bit of the asynchronous FIFO.
Platform: | Size: 82944 | Author: | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 基于VHDL语言的fpga 实现FIFO 源程序，经验证可用，开发环境Quartus -VHDL FPGA FIFO QUARTUS II
Platform: | Size: 4096 | Author: 谢家 | Hits:

[VHDL-FPGA-Verilog] quartusII-FIFO

Description: 教你如何用QuartusII软件设计FIFO-us QuartusII design FIFO
Platform: | Size: 2050048 | Author: 李璞玉 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: Quartus下VHDL编写的一个FIFO模块，调试于c6000系列。控制Cache输入输出数据-A FIFO module in VHDL Quartus, commissioning c6000 series
Platform: | Size: 336896 | Author: voldemortqq | Hits:

[VHDL-FPGA-Verilog] asynchronous-fifo

Description: 同步fifo的调用程序，调用Quartus II 9.0 (32-Bit)中的fifo模块-Synchronous fifo calling program, call Quartus II 9.0 (32-Bit) in fifo module
Platform: | Size: 749568 | Author: 刘茂茂 | Hits:

[VHDL-FPGA-Verilog] Quartus

Description: VERILOG AD采集程序 FIFO存储-VERILOG AD acquisition program FIFO memory
Platform: | Size: 739328 | Author: | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: FPGA片内FIFO实例，对FPGA片内FIFO进行读写测试(FPGA FIFO example, reading and writing FIFO in FPGA chip.)
Platform: | Size: 3554304 | Author: 小猪仔521 | Hits:
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